Fir Filter Architecture Implementation Using New Double Base Number System for Better Performance

High Speed Complex multipliers are the stumbling blocks in programmable finite impulse response (FIR) digital filters. As the filter coefficients change either dynamically or periodically, the search for common sub expressions for multiplier less implementation needs to be performed over the entire gamut of integers of the desired precision, and the amount of shifts associated with each identified common sub expression needs to be memorized. The complexity of a quality search is thus beyond the existing design algorithms based on conventional binary and signed digit representations. This paper presents a new design paradigm for the programmable FIR filters by exploiting the extended double base number system (EDBNS). Due to its sparsity and innate abstraction of the sum of binary shifted partial products, the sharing of HCSLA adders in the time-multiplexed multiple constant multiplication blocks of the programmable FIR filters can be maximized by a direct mapping from the quasi-minimum EDBNS. The multiplexing cost can be further reduced by merging double base terms. In our Proposed paper we are replacing shifters in the second level is replaced by Barrel shifter so the delay can be reduced Logic synthesis results on more than one hundred programmable filters with filter taps ranging from 10 to 100 and co-efficients word lengths of 8 have been verified.